Even though the processor systems described herein can be used universally, in particular in various types of vehicles, the principles and modes of operation of the processor systems and the problem addressed thereby are described in greater detail with reference to an aircraft. In principle, however, the present disclosure can also be used in other aircraft and in water vehicles, rail vehicles, spacecraft or the like which are suitable for transporting people. Furthermore, the present disclosure can also be used in stationary applications, such as in safety-related systems, which must comply with the standard IEC61508/IEC61511, according to which electrical, electronic or programmable electronic components of the system of which the failure can mean a significant risk for people, equipment or the environment must adhere to safety-oriented design principles.
Multi-core processors provide cost-effective, scalable and energy-efficient processing power for embedded systems. In addition to the efficient use of available parallel processing resources, it must be ensured that non-functional requirements, in particular in the area of real-time capability, failure safety, observance of energy/loss performance limits, fault tolerance, protection against data manipulation and security against attacks, can be adhered to in the case of use in critical target applications such as driver assistance systems, industrial automation or medical technology.
When executing safety-related applications alongside other applications on multi-core processors, the latency periods for accessing data during the execution of the applications should be as short as possible. The distribution of these latency periods should be kept within narrow limits, since the worst case scenario must always be assumed when planning safety-related applications in a system. Targeted optimisation for registers, caches and memory connection is therefore indispensable.
US 2014/0229956 A1 discloses a multi-processor-core system comprising distributed processor cores and resource monitors executed thereon; if, as indicated by one of the resource monitors, an application executed on a first processor core has insufficient resources, the resource allocation for an application executed on a second processor core can be restricted.
US 2012/0151276 A1 discloses a computer-monitoring system, in which various performance parameters are retrieved and statistically analysed in order to identify deviations from a standard behavior, which indicates a deterioration in performance and imminent failure of the computer.